Gate-Bias-Induced Threshold Voltage Shifts in GaN FATFETs

Abstract

The threshold voltage (V TH) stability in GaN fat field-effect transistors (FATFETs) with a large channel area of ∼6.2 × 104 μm2 was studied using drain current vs gate voltage (I D–V G) characteristics. Each measurement was found to positively shift the previous I D–V G curve, and V TH eventually saturated with increasing number of measurements. The saturated V TH was ∼0.8 V for measurements in which V G ranged from −10 to 25 V and was ∼8 V for measurements in which the V G ranged from −10 to 40 V. Moreover, the positive gate bias stress increased V TH to 12.3 V. These shifts of V TH can be explained by electron trapping; according to charge-pumping measurements, the traps cannot exist in the oxide or the oxide/p-GaN interface but can exist near the surface region in p-GaN layers in GaN FATFETs. Scanning transmission electron microscopy and electron energy-loss spectroscopy analyses revealed the presence of oxygen within several atomic layers of p-GaN from the oxide/p-GaN interface. This intermixed oxygen might be the origin of the n-type behavior of the p-GaN surface; furthermore, the oxygen is speculated to be related to the traps. Surprisingly, similar incorporated oxygen was observed even in the surface region of as-grown p-GaN layers.