Optimization of Ferroelectric SELBOX TFET and Ferroelectric SOI TFET
Author:
Funder
CSIR-EMR-II
Publisher
The Electrochemical Society
Subject
Electronic, Optical and Magnetic Materials
Link
https://iopscience.iop.org/article/10.1149/2162-8777/ab697e/pdf
Reference28 articles.
1. Physics-based surface potential, electric field and drain current model of aδp+Si1–xGexgate–drain underlap nanoscale n-TFET
2. Optimisation of electrical parameters in Fe DS-SBTFET and its application as a digital inverter
3. Double-Gate Tunnel FET With High-$\kappa$ Gate Dielectric
4. A comparative study of radio frequency stability performance of Double Gate MOSFET and Double Gate Tunnel FET
5. Short-channel effect in fully depleted SOI MOSFETs
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2. Performances of gate stacked heterojunction SELBOX and SOI tunnel FETs including interface trap charges: A simulation study;Materials Science and Engineering: B;2024-02
3. Heterostructure performance evaluation: A numerical simulation and analytical modeling of the ferroelectric pocket doped double gate tunnel FET;International Journal of Numerical Modelling: Electronic Networks, Devices and Fields;2023-10-28
4. Dependence of RF/analog and linearity parameters on ferroelectric layer thickness in ferroelectric tunnel junction dual material double gate (FTJ-DMDG) TFET;Ferroelectrics;2023-01-02
5. Comparative analysis of Change plasma and Junctionless Ferroelectric tunneling junction of VTFET for improved performance;Silicon;2022-07-21
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