Nature of Interface Traps in Si/SiO2/HfO2 /TiN Gate Stacks and its Correlation with the Flat-band Voltage Roll-off

Author:

Kar S.

Abstract

We have carried out a detailed experimental investigation of the trap parameters - trap energy, trap density, and hole capture cross-section - in a large number of p-Si/SiO2/HfO2/TaN MOS capacitors fabricated on wafers with graded SiO2 layer, and of the flat-band voltage, using a newly developed admittance spectroscopy technique, which yields accurate values of the surface potential and the flat-band voltage, and makes use of the measured conductance to obtain accurate values of the trap parameters. The correlation between the trap density and the flat-band voltage has been analyzed.

Publisher

The Electrochemical Society

Cited by 4 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Interface state density engineering in Hf1-xZrxO2/SiON/Si gate stack;Journal of Vacuum Science & Technology B, Nanotechnology and Microelectronics: Materials, Processing, Measurement, and Phenomena;2016-01

2. On the Characteristics of Traps and Charges in the Si/SiO2/HfO2/TaN High-k Gate Stacks;ECS Journal of Solid State Science and Technology;2013-12-24

3. MOSFET: Basics, Characteristics, and Characterization;High Permittivity Gate Dielectric Materials;2013

4. Closed-Form Model for High-k MOSFET Channel Parameters: Reflecting Non-Saturating Inversion Surface Potential, Gate Stack Traps, and Work Function Anomaly;ECS Journal of Solid State Science and Technology;2012

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