Dry Etch Challenges in Gate All Around Devices for sub 32 nm Applications

Author:

Barnola Sebastien,Vizioz Christian,Vulliet Nathalie,Dupré Cécilia,Ernst Thomas,Gautier Pauline,Arvet Christian,Guillaumot Bernard,Bernard Emilie,Pauliac-Vaujeour S.,Comboroure Corine,Hartmann Jean-Michel,Borel Stephan,Chevolleau Thierry,Maffini-Alvaro V,Becu S

Abstract

We present a novel approach to pattern aggressive aspect ratio Si/Si1-xGex superlattices on Silicon On Insulator (SOI) wafers. This approach is based on the anisotropic etching of Si/SiGe superlattices with final dimensions down to 30nm, and the isotropic etching of the SiGe selectively to silicon. This isotropic etching was developed in a remote plasma chamber, and in-situ in an Inductive Coupled Plasma (ICP) reactor.

Publisher

The Electrochemical Society

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