Author:
Gity Farzan,Byun Ki Yeol,Lee KoHsin,Cherkaoui Karim,Hayes John M.,Morrison Alan P.,Colinge Cindy,Corbett Brian
Abstract
We report on the formation and electrical characterization of current transport across a p-Ge to n-Si diode structure obtained by direct wafer bonding and layer exfoliation. A low temperature anneal at 400 °C for 30 minutes improved the forward characteristics of the diode. The Ion/Ioff ratio > 5×104 and > 8×103 is obtained at -0.5 V and -1 V, respectively The carrier transport mechanism was analyzed based on the I-V and C-V measurements and direct tunneling is suggested as the transport mechanism. This fabrication technique using a low thermal budget (T ≤ 400 °C) is an attractive option for heterogeneous integration.
Publisher
The Electrochemical Society
Cited by
5 articles.
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