A multistandard and resource-efficient Viterbi decoder for a multimode communication system

Author:

Xie Yi-qiORCID,Yu Zhi-guo,Feng Yang,Zhao Lin-na,Gu Xiao-feng

Funder

the Natural Science Foundation of Jiangsu Province, China

the Summit of the Six Top Talents Program of Jiangsu Province, China

the Fundamental Research Funds for the Central Universities, China

the Graduate Student Innovation Program for Universities of Jiangsu Province, China

Publisher

Zhejiang University Press

Subject

Electrical and Electronic Engineering,Computer Networks and Communications,Hardware and Architecture,Signal Processing

Reference13 articles.

1. Batcha MFN, Sha’ameri AZ, 2007. Configurable adaptive Viterbi decoder for GPRS, EDGE and Wimax. IEEE Int Conf on Telecommunications and Malaysia Int Conf on Communications, p.237–241. https://doi.org/10.1109/ICTMICC.2007.4448640

2. Benaissa M, Zhu YQ, 2003. A novel high-speed configurable Viterbi decoder for broadband access. EURASIP J Adv Signal Process, 2003(13):1317–1327. https://doi.org/10.1155/S1110865703310054

3. Bissi L, Placidi P, Baruffa G, et al., 2008. A Viterbi decoder architecture for a standard-agile and reprogrammable transceiver. Integr VLSI J, 41(2):161–170. https://doi.org/10.1016/j.vlsi.2007.04.001

4. Campos JM, Cumplido R, 2006. A runtime reconfigurable architecture for Viterbi decoding. 3rd Int Conf on Electrical and Electronics Engineering, p.1-4. https://doi.org/10.1109/ICEEE.2006.251908

5. Cavallaro JR, Vaya M, 2003. Viturbo: a reconfigurable architecture for Viterbi and Turbo decoding. IEEE Int Conf on Acoustics, Speech, and Signal Processing, p.497–500. https://doi.org/10.1109/ICASSP.2003.1202412

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