Low Power VLSI Implementation of Convolution Encoder and Viterbi Decoder using Verilog HDL
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Published:2020-12-25
Issue:13
Volume:13
Page:177-184
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ISSN:0974-6455
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Container-title:Bioscience Biotechnology Research Communications
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language:
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Short-container-title:Biosci. Biotech. Res. Comm
Publisher
Society for Science and Nature