Dual-configuration in-memory computing bitcells using SiO<sub><i>x</i></sub> RRAM for binary neural networks-Reference-Cited by-同舟云学术

Dual-configuration in-memory computing bitcells using SiO_x RRAM for binary neural networks

Published:2022-01-17 Issue:3 Volume:120 Page:034102
ISSN:0003-6951
Container-title:Applied Physics Letters
language:en
Short-container-title:Appl. Phys. Lett.

Author:

Kingra Sandeep Kaur¹^ORCID,Parmar Vivek¹^ORCID,Negi Shubham¹,Bricalli Alessandro²,Piccolboni Giuseppe²,Regev Amir²^ORCID,Nodin Jean-François³,Molas Gabriel³^ORCID,Suri Manan¹^ORCID

Affiliation:

1. Indian Institute of Technology Delhi, Hauz Khas, New Delhi, India

2. Weebit Nano, Hod Hasharon, Israel

3. CEA-Leti, Grenoble, France

Funder

Science and Engineering Research Board

Indian Institute of Technology Delhi

Publisher

AIP Publishing

Subject

Physics and Astronomy (miscellaneous)

Link

https://aip.scitation.org/doi/pdf/10.1063/5.0073284

Reference11 articles.

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2. W. H. Choi , P.F. Chiu , W. Ma , G. Hemink , T. T. Hoang , M. Lueker-Boden , and Z. Bandic , in 2020 IEEE International Symposium on Circuits and Systems (ISCAS) ( IEEE, 2020), pp. 1–5.

3. M. Bocquet , T. Hirztlin , J.O. Klein , E. Nowak , E. Vianello , J.M. Portal , and D. Querlioz , in 2018 IEEE International Electron Devices Meeting (IEDM) ( IEEE, 2018), pp. 20.6.1–20.6.4.

4. Hardware implementation of RRAM based binarized neural networks

5. High-Throughput In-Memory Computing for Binary Deep Neural Networks With Monolithically Integrated RRAM and 90-nm CMOS

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