Electro-thermal modeling and reliability analysis of Cu–carbon hybrid interconnects for beyond-CMOS computing
Author:
Affiliation:
1. Department of Electronics and Communication Engineering, Indian Institute of Technology (Indian School of Mines), Dhanbad 826004, India
2. Department of Electrical Engineering, Indian Institute of Technology Ropar, Rupnagar, Punjab, India
Abstract
Funder
Science and Engineering Research Board
DST (FIST) of the Department of Electronics Engineering, IIT (ISM) Dhanbad under
TexMin foundation under Technology Innovation Hub at IIT(ISM), Dhanbad sponsored by DST, Government of India.
Publisher
AIP Publishing
Subject
Physics and Astronomy (miscellaneous)
Link
https://aip.scitation.org/doi/pdf/10.1063/5.0101329
Reference24 articles.
1. See https://irds.ieee.org/editions/2017 “ International Roadmap for Devices and Systems (IRDS-2017) Reports.”
2. Energy dissipation and transport in nanoscale devices
3. Heat Generation and Transport in Nanometer-Scale Transistors
4. Analysis of Crosstalk-Induced Effects in Multilayer Graphene Nanoribbon Interconnects
5. Scaling Analysis of Multilevel Interconnect Temperatures for High-Performance ICs
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