Analytic drain current model for III–V cylindrical nanowire transistors
Author:
Affiliation:
1. Dpto. de Electrónica, Universidad de Granada, Av. Fuentenueva, 18071 Granada, Spain
2. IBM Research Zürich, Säumerstrasse 4, 8803 Rüschlikon, Switzerland
Funder
Spanish Government
Spanish Ministry of Education
Universidad de Granada
Publisher
AIP Publishing
Subject
General Physics and Astronomy
Link
http://aip.scitation.org/doi/pdf/10.1063/1.4927041
Reference31 articles.
1. Design of ion-implanted MOSFET's with very small physical dimensions
2. Tunnel field-effect transistors as energy-efficient electronic switches
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4. Nanometre-scale electronics with III–V compound semiconductors
5. Continuous Analytic I–V Model for Surrounding-Gate MOSFETs
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