Extraction of strained-Si metal-oxide-semiconductor field-effect transistor parameters using small signal channel conductance method
Author:
Publisher
AIP Publishing
Subject
General Physics and Astronomy
Link
http://aip.scitation.org/doi/pdf/10.1063/1.2161800
Reference39 articles.
1. CMOS scaling into the 21st century: 0.1 µm and beyond
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1. On the C-V characteristics of nanoscale strained gate-all-around Si/SiGe MOSFETs;Solid-State Electronics;2019-04
2. Device Physics of Contact Issues for the Overestimation and Underestimation of Carrier Mobility in Field-Effect Transistors;Physical Review Applied;2017-09-22
3. Strain induced changes in performance of strained-Si/strained-Si1-y Ge y /relaxed-Si1-x Ge x MOSFETs and circuits for digital applications;Journal of Central South University;2017-06
4. Modeling gate-all-around Si/SiGe MOSFETs and circuits for digital applications;Journal of Computational Electronics;2016-12-19
5. Development of a simulator for analyzing some performance parameters of nanoscale strained silicon MOSFET-based CMOS inverters;Microelectronics Journal;2016-09
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