A Novel Design Method for 4-bit Absolute-Value Detector

Abstract

The wide use of comparator reinforces its improvements and innovations. For seeking a breakthrough, a 4-Bit Absolute-value Detector is studied and constructed. Different from common designs, this new version adds an absolute value converter using truth table. Owing to the participation of absolute value detector the comparator can compare the absolute value of the two inputs' value directly in this detector. Furthermore, the detector’s delay and energy consumption which are calculated by critical path data demonstrates the performance of the detector and provides circuit optimization scheme indirectly. The analysis indicates that this improved version's minimum and maximum delay is 50.556 and 75.834 and energy consumption is 39.8% lower when supplied by optimal VDD than 1V VDD. Combining the converter with the comparator, a 4-Bit Absolute-value Detector model with smaller size and higher efficiency is built.