A High Performance Co-design of 26 nm 64 Gb MLC NAND Flash Memory using the Dedicated NAND Flash Controller-Reference-Cited by-同舟云学术

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A High Performance Co-design of 26 nm 64 Gb MLC NAND Flash Memory using the Dedicated NAND Flash Controller

Published:2011-06-30 Issue:2 Volume:11 Page:121-129
ISSN:1598-1657
Container-title:JSTS:Journal of Semiconductor Technology and Science
language:en
Short-container-title:JSTS:Journal of Semiconductor Technology and Science

Author:

You Byoung-Sung,Park Jin-Su,Lee Sang-Don,Baek Gwang-Ho,Lee Jae-Ho,Kim Min-Su,Kim Jong-Woo,Chung Hyun,Jang Eun-Seong,Kim Tae-Yoon

Publisher

The Institute of Electronics Engineers of Korea

Subject

Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials

Link

http://ocean.kisti.re.kr/downfile/crosscheck/ieek/JAKO201120956423094.pdf

Cited by 10 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Review of Semiconductor Flash Memory Devices for Material and Process Issues;Advanced Materials;2022-05-22

2. Thermal Analysis of Ball Grid Array Non-Volatile Memory Express Solid-State Drive in Vacuum;IEEE Electron Device Letters;2018-12

3. Effective Lifetime-Aware Dynamic Throttling for NAND Flash-Based SSDs;IEEE Transactions on Computers;2016-04-01

4. 2QW-Clock: An Efficient SSD Buffer Management Algorithm;2015 IEEE 22nd International Conference on High Performance Computing (HiPC);2015-12

5. Analysis of read disturbance mechanism in retention of sub-20 nm NAND flash memory;Japanese Journal of Applied Physics;2015-02-24

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