Device performance and strain effect of sub-5 nm monolayer InP transistors-Reference-Cited by-同舟云学术

Device performance and strain effect of sub-5 nm monolayer InP transistors

Published:2022 Issue:6 Volume:10 Page:2223-2235
ISSN:2050-7526
Container-title:Journal of Materials Chemistry C
language:en
Short-container-title:J. Mater. Chem. C

Author:

Xu Linqiang¹^ORCID,Quhe Ruge²,Li Qiuhui¹,Liu Shiqi¹^ORCID,Yang Jie¹,Yang Chen¹^ORCID,Shi Bowen¹,Tang Hao¹,Li Ying¹,Sun Xiaotian³^ORCID,Yang JinBo¹⁴⁵⁶,Lu Jing¹⁴⁵⁶^ORCID

Affiliation:

1. State Key Laboratory of Mesoscopic Physics and Department of Physics, Peking University, Beijing 100871, P. R. China

2. State Key Laboratory of Information Photonics and Optical Communications and School of Science, Beijing University of Posts and Telecommunications, Beijing 100876, P. R. China

3. College of Chemistry and Chemical Engineering, and Henan Key Laboratory of Function-Oriented Porous Materials, Luoyang Normal University, Luoyang 471934, P. R. China

4. Collaborative Innovation Center of Quantum Matter, Beijing 100871, P. R. China

5. Beijing Key Laboratory for Magnetoelectric Materials and Devices (BKL-MEMD), Beijing 100871, P. R. China

6. Peking University Yangtze Delta Institute of Optoelectronics Nantong, Jiangsu 226010, P. R. China

Abstract

The performance limit of the sub-5 nm monolayer (ML) indium phosphide (InP) FETs is explored. Ion, τ, and PDP of the ML InP FETs could meet the ITRS demands for the high-performance/low-power devices until gate length is reduced to 2/4 nm.

Funder

Ministry of Science and Technology

National Natural Science Foundation of China

Publisher

Royal Society of Chemistry (RSC)

Subject

Materials Chemistry,General Chemistry

Link

http://pubs.rsc.org/en/content/articlepdf/2022/TC/D1TC03814A

Reference65 articles.

1. Multigate transistors as the future of classical metal–oxide–semiconductor field-effect transistors

2. Current trends in changing the channel in MOSFETs by III–V semiconducting nanostructures