Gate Bias Stress Instability and Hysteresis Characteristics of InAs Nanowire Field-Effect Transistors-Reference-Cited by-同舟云学术

Gate Bias Stress Instability and Hysteresis Characteristics of InAs Nanowire Field-Effect Transistors

Published:2020-12-08 Issue:50 Volume:12 Page:56330-56337
ISSN:1944-8244
Container-title:ACS Applied Materials & Interfaces
language:en
Short-container-title:ACS Appl. Mater. Interfaces

Author:

Lan Changyong¹^ORCID,Yip SenPo,Kang Xiaolin,Meng You,Bu Xiuming^ORCID,Ho Johnny C.²^ORCID

Affiliation:

1. State Key Laboratory of Electronic Thin Films and Integrated Devices, and School of Optoelectronic Science and Engineering, University of Electronic Science and Technology of China, Chengdu 610054, P. R. China

2. Key Laboratory of Advanced Materials Processing & Mold (Zhengzhou University), Ministry of Education, Zhengzhou 450002, P. R. China

Funder

Research Grants Council, University Grants Committee

Ministry of Education of the People's Republic of China

University of Electronic Science and Technology of China

National Natural Science Foundation of China

Publisher

American Chemical Society (ACS)

Subject

General Materials Science

Link

https://pubs.acs.org/doi/pdf/10.1021/acsami.0c17317

Reference36 articles.

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5. III–V Nanowires: Synthesis, Property Manipulations, and Device Applications

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