Using Nuprl for the verification and synthesis of hardware

Author:

Abstract

The Nuprl proof development system, based on constructive type theory, has a sophisticated proof editor and user interface which facilitates the development of proofs and specifications. We present our experience using Nuprl for hardware verification and. synthesis. We have verified floating point hardware and are extending this work to reasoning about the IEEE floating point specification. In addition we are using Nuprl to reason about software for synthesizing hardware designs at several different levels. We present two efforts in this area. In the first, we prove a system that synthesizes CMOS circuits from boolean equations. The second system, PBS, minimizes large sets of boolean formulae by using the weak division algorithm.

Publisher

The Royal Society

Subject

Pharmacology (medical),Complementary and alternative medicine,Pharmaceutical Science

Reference27 articles.

1. Aagaard M. & Leeser M. 1991 A formally verified system for logic synthesis. In International Conference on Computer Design. IEEE October 1991.

2. Formal methods applied to a floating-point number system

3. Basin D. 1991 Extracting circuits from constructive proofs. In Workshop on Formal Methods in VLSI Design. ACM 1991.

4. Basin D. A. & DelVecchio P. 1990 Verification of combinational logic in Nuprl. In Hardware specification verification and synthesis: mathematical aspects (ed. M. E. Leeser & G. M. Brown) pp. 333-357. Springer Verlag LNCS 408.

5. Formally verified synthesis of combinational CMOS circuits

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