1. High Performance VLSI Architecture of FIR Filter for Seismic Signal Processing;2023 Third International Conference on Advances in Electrical, Computing, Communication and Sustainable Technologies (ICAECT);2023-01-05
2. A Multiplierless Parallel Digital Down Converter for High Resolution Spaceborne SAR;2022 7th International Conference on Intelligent Computing and Signal Processing (ICSP);2022-04-15
3. A New Low-Power Architecture Design for Distributed Arithmetic Unit in FIR Filter Implementation;Circuits, Systems, and Signal Processing;2013-11-01