Effects of Silicon Implantation and Processing Temperature on Performance of Polycrystalline Silicon Thin-Film Transistors Fabricated from Low Pressure Chemical Vapor Deposited Amorphous Silicon

Abstract

ABSTRACTSilicon implantation has been found to dramatically enhance the grain size of polysilicon crystallized from LPCVD a-Si by retarding the nucleation process at the substrate interface. Corresponding improvement in TFT device performance was also observed, resulting in field effect mobilities as high as 109 cm2/Vs in devices with 1000 Å thick Si active layer. This effect is more significant in device fabrication processes with higher temperature, possibly due to increasingly efficient removal of implant related defects.