Wafer Cleaning Influence on the Roughness of the Si/SiO2 Interface

Abstract

ABSTRACTThe roughness of the Si/SiO2 interface has a great impact on the electrical properties of the gate-oxide in integrated circuits and consequently it is a large concern for the semiconductor industry. As the thickness of the oxide is decreased, the role of the roughness becomes more critical for the device. The nature of a buried interface prohibits the use of commonly used surface techniques. By the use of crystal truncation rod (CTR) x-ray scattering, it is possible to get information on the termination of the bulk silicon in a nondestructive fashion. The authors have investigated the influence of different cleanings on interfacial roughness using synchrotron radiation-based CTR-scattering. In particular, we looked at silicon(001) wafers both before and after the growth of a 1000Å thermal oxide. The results show that the use of HF during cleaning results in a smoother interface between silicon and its native oxide. Due to smoothing of the interface during the oxidation process, the difference between the various cleaning methods becomes less significant for these thick oxides.