Influence of Gate Depletion Layer Width on Radiation Resistance of Silicon Carbide Junction Field-Effect Transistors

Author:

Takeyama Akinori1ORCID,Makino Takahiro1,Tanaka Yasunori2,Kuroki Shin-Ichiro3ORCID,Ohshima Takeshi1ORCID

Affiliation:

1. National Institutes for Quantum Science and Technology, 1233 Watanuki-Machi, Takasaki 370-1292, Japan

2. National Institute of Advanced Industrial Science and Technology, 1-1-1 Umezono, Tsukuba 305-8560, Japan

3. Research Institute for Nanodevices, Hiroshima University, 1-4-2 Kagamiyama, Higashi-Hiroshima 739-8527, Japan

Abstract

Silicon carbide junction field-effect transistors (SiC JFETs) are promising candidates as devices applicable to radiation conditions, such as the decommissioning of nuclear facilities or the space environment. We investigate the origin of the threshold volage (Vth) shift and hysteresis of differently structured SiC JFETs. A large positive Vth shift and hysteresis are observed for a depletion-type JFET with a larger depletion layer width. With changing the sweep range of the gate voltage and depletion width, the Vth shift was positively proportional to the difference between the channel depth and depletion width (channel depth–gate depletion width). By illuminating the sub-band gap light, the Vth of the irradiated depletion JFETs recovers close to nonirradiated ones, while a smaller shift and hysteresis are observed for the enhancement type with a narrower width. It can be interpreted that positive charges generated in a gate depletion layer cause a positive Vth shift. When they are swept out from the depletion layer and trapped in the channel, this gives rise to a further Vth shift and hysteresis in gamma-irradiated SiC JFETs.

Funder

MEXT; “Nuclear Energy S&T and Human Resource Development Project (through concentrating wisdom)”

Publisher

MDPI AG

Subject

Nuclear and High Energy Physics,Atomic and Molecular Physics, and Optics

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