Experimental and Modeling Study on the High-Performance p++-GaAs/n++-GaAs Tunnel Junctions with Silicon and Tellurium Co-Doped InGaAs Quantum Well Inserted

Abstract

The development of high-performance tunnel junctions is critical for achieving high efficiency in multi-junction solar cells (MJSC) that can operate at high concentrations. We investigate silicon and tellurium co-doping of InGaAs quantum well inserts in p++-GaAs/n++-GaAs tunnel junctions and report a peak current density as high as 5839 A cm−2 with a series resistance of 5.86 × 10−5 Ω cm2. In addition, we discuss how device performance is affected by the growth temperature, thickness, and V/III ratio in the InGaAs layer. A simulation model indicates that the contribution of trap-assisted tunneling enhances carrier tunneling.