Affiliation:
1. Department of Electrical Engineering, National Taiwan Normal University, Taipei City 106, Taiwan
Abstract
In prior technology, system-level electrostatic discharge (ESD) tests under environment change conditions mainly focused on testing the effect of a high-temperature environment. i.e., the effect on internal circuits of heat generated outside. However, few studies have explored the effect of ambient relative humidity changes on integrated circuits (ICs). Therefore, this study will analyze the performance of various ESD protection components under high ambient temperature and high ambient relative humidity. The ESD protection devices are tested for the ESD robustness of the silicon-controlled rectifiers (SCR) under a harsh environment and the measurement results are discussed and verified in the CMOS process.
Funder
National Science and Technology Council, Taiwan
Subject
General Materials Science
Reference16 articles.
1. Wei, P., Maghlakelidze, G., Zhou, J., Gossner, H., and Pommerenke, D. (2018, January 23–28). An application of system level efficient ESD design for high-speed USB3.x interface. Proceedings of the 2018 40th Electrical Overstress/Electrostatic Discharge Symposium (EOS/ESD), Reno, NV, USA.
2. Vashchenko, V., and Scholz, M. (2014). System Level ESD Protection, Springer.
3. (2008). EMC—Part 4-2: Testing and Measurement Techniques—Electrostatic Discharge Immunity Test (Standard No. IEC 6100-4-2 Standard).
4. Chen, R., Wei, H., Liu, H., Liu, Z., and Chen, Y. (2022). Ultra-Low-Voltage-Triggered Silicon Controlled Rectifier ESD Protection Device for 2.5 V Nano Integrated Circuit. Nanomaterials, 12.
5. Chang, C.-R., Dai, Z.-J., and Lin, C.-Y. (2023). π-Shape ESD Protection Design for Multi-Gbps High-Speed Circuits in CMOS Technology. Materials, 16.