Structure Optimization of Planar Nanoscale Vacuum Channel Transistor-Reference-Cited by-同舟云学术

Structure Optimization of Planar Nanoscale Vacuum Channel Transistor

Published:2023-02-19 Issue:2 Volume:14 Page:488
ISSN:2072-666X
Container-title:Micromachines
language:en
Short-container-title:Micromachines

Author:

Xu Ji¹,Lin Congyuan¹,Li Yu¹,Zhao Xueliang¹,Shi Yongjiao²,Zhang Xiaobing²

Affiliation:

1. School of Electronic and Information Engineering, Nanjing University of Information Science and Technology, Nanjing 210044, China

2. Joint International Research Laboratory of Information Display and Visualization, School of Electronic Science and Engineering, Southeast University, Nanjing 210096, China

Abstract

Due to its unique structure, discoveries in nanoscale vacuum channel transistors (NVCTs) have demonstrated novel vacuum nanoelectronics. In this paper, the structural parameters of planar-type NVCTs were simulated, which illustrated the influence of emitter tip morphology on emission performance. Based on simulations, we successfully fabricated back-gate and side-gate NVCTs, respectively. Furthermore, the electric properties of NVCTs were investigated, showing the potential to realize the high integration of vacuum transistors.

Funder

National Natural Science Foundation of China

Publisher

MDPI AG

Subject

Electrical and Electronic Engineering,Mechanical Engineering,Control and Systems Engineering

Link

https://www.mdpi.com/2072-666X/14/2/488/pdf

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