Sensing Circuit Design Techniques for RRAM in Advanced CMOS Technology Nodes

Abstract

Resistive random access memory (RRAM) is one of the most promising new nonvolatile memories because of its excellent properties. Moreover, due to fast read speed and low work voltage, it is suitable for seldom-write frequent-read applications. However, as technology nodes shrink, RRAM faces many issues, which can significantly degrade RRAM performance. Therefore, it is necessary to optimize the sensing schemes to improve the application range of RRAM. In this paper, the issues faced by RRAM in advanced technology nodes are summarized. Then, the advantages and weaknesses in the novel design and optimization methodologies of sensing schemes are introduced in detail from three aspects, the reference schemes, sensing amplifier schemes, and bit line (BL)-enhancing schemes, according to the development of technology in especially recent years, which can be the reference for designing the sensing schemes. Moreover, the waveforms and results of each method are illustrated to make the design easy to understand. With the development of technology, the sensing schemes of RRAM become higher speed and resolution, low power consumption, and are applied at advanced technology nodes and low working voltage. Now, the most advanced nodes the RRAM applied is 14 nm node, the lowest working voltage can reach 0.32 V, and the shortest access time can be only a few nanoseconds.