LazyRS: Improving the Performance and Reliability of High-Capacity TLC/QLC Flash-Based Storage Systems Using Lazy Reprogramming
-
Published:2023-02-07
Issue:4
Volume:12
Page:843
-
ISSN:2079-9292
-
Container-title:Electronics
-
language:en
-
Short-container-title:Electronics
Author:
Kim Beomjun1ORCID, Kim Myungsuk1ORCID
Affiliation:
1. School of Computer Science and Engineering, Kyungpook National University, Daegu 37224, Republic of Korea
Abstract
We propose a new NAND programming scheme called the lazy reprogramming scheme (LazyRS) which divides a program operation into two stages, where the second stage is delayed until it is needed. LazyRS optimizes the program latency by skipping the second stage if it is not required. An idle interval before the second stage improves the flash reliability as well. To maximize the benefit of LazyRS, a LazyRS-aware FTL adjusts the length of an idle interval dynamically over changing workload characteristics. The experimental results show that the LazyRS-aware FTL can efficiently improve the write throughput and reliability of flash-based storage systems by up to 2.6 times and 31.2%, respectively.
Funder
National Research Foundation of Korea
Subject
Electrical and Electronic Engineering,Computer Networks and Communications,Hardware and Architecture,Signal Processing,Control and Systems Engineering
Reference28 articles.
1. Shibata, N., Kanda, K., Shimizu, T., Nakai, J., Nagao, O., Kobayashi, N., Miakashi, M., Nagadomi, Y., Nakano, T., and Kawabe, T. (2019, January 17–21). 13.1 A 1.33Tb 4-bit/Cell 3D-Flash Memory on a 96-Word-Line-Layer Technology. Proceedings of the 2019 IEEE International Solid- State Circuits Conference—(ISSCC), San Francisco, CA, USA. 2. Lee, S., Kim, C., Kim, M., Joe, S.-M., Jang, J., Kim, S., Lee, K., Kim, J., Park, J., and Lee, H.-J. (2018, January 11–15). A 1Tb 4b/cell 64-stacked-WL 3D NAND flash memory with 12MB/s program throughput. Proceedings of the 2018 IEEE International Solid- State Circuits Conference—(ISSCC), San Francisco, CA, USA. 3. Takai, Y., Fukuchi, M., Kinoshita, R., Matsui, C., and Takeuchi, K. (2019, January 12–15). Analysis on Heterogeneous SSD Configuration with Quadruple-Level Cell (QLC) NAND Flash Memory. Proceedings of the 2019 IEEE 11th International Memory Workshop (IMW), Monterey, CA, USA. 4. Goda, A. (2021). Recent progress on 3D NAND flash technologies. Electronics, 10. 5. Cho, W., Jung, J., Kim, J., Ham, J., Lee, S., Noh, Y., Kim, D., Lee, W., Cho, K., and Kim, K. (2022, January 20–26). A 1-Tb, 4b/Cell, 176-Stacked-WL 3D-NAND Flash Memory with Improved Read Latency and a 14.8 Gb/mm2 Density. Proceedings of the 2022 IEEE International Solid-State Circuits Conference (ISSCC), San Francisco, CA, USA.
Cited by
1 articles.
订阅此论文施引文献
订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. Midas Touch: Invalid-Data Assisted Reliability and Performance Boost for 3d High-Density Flash;2024 IEEE International Symposium on High-Performance Computer Architecture (HPCA);2024-03-02
|
|