Uniform Oxide Layer Integration in Amorphous IGZO Thin Film Transistors for Enhanced Multilevel-Cell NAND Memory Performance

Abstract

In this work, the implementation of HfZrO layers for the tunneling, charge trapping, and blocking mechanisms within the device offer benefits in terms of programmability and data retention. This configuration has resulted in a memory device that can achieve a significant difference in threshold voltage of around 2 V per memory level. This difference is crucial for effectively distinguishing between multiple levels of memory in MLC applications. Additionally, the device operates at low programming voltages below 14 V. Furthermore, the device showcases impressive endurance and data retention capabilities, maintaining a large memory window over extended periods and under varying temperature conditions. The advancement in the a-IGZO-based memory device, characterized by its uniform oxide stacking, presents a viable solution to the industry’s requirement for memory storage options that are efficient, dependable, and economical.