Author:
Kumar Aruru Sai,Rao T.V.K. Hanumantha
Subject
Hardware and Architecture,Software
Cited by
26 articles.
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1. Cycle-accurate multi-FPGA platform for accelerated emulation of large on-chip networks;The Journal of Supercomputing;2024-06-23
2. Electronic Computer-Aided Design for Low-Level Modeling of Networks-on-Chip;IEEE Access;2024
3. An Efficient High Performance GDI based 4-bit Vedic Multiplier in 32nm Technology;2023 Global Conference on Information Technologies and Communications (GCITC);2023-12-01
4. High performance FIR Architecture for EOG Signal Noise Supression;2023 14th International Conference on Computing Communication and Networking Technologies (ICCCNT);2023-07-06
5. Implementation of Efficient Restoring and Long Division Algorithm;2023 14th International Conference on Computing Communication and Networking Technologies (ICCCNT);2023-07-06