Panel‐Level Packaging for Heterogenous Integration-Reference-Cited by-同舟云学术

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Panel‐Level Packaging for Heterogenous Integration

Published:2021-12-03 Issue: Volume: Page:155-167
ISSN:
Container-title:Embedded and Fan‐Out Wafer and Panel Level Packaging Technologies for Advanced Application Spaces
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Author:

Töpper M.,Braun T.,Billaud M.,Stobbe L.

Publisher

Wiley

Link

https://onlinelibrary.wiley.com/doi/pdf/10.1002/9781119793908.ch6

Reference15 articles.

1. Heterogeneous Integration: Building the Foundation for Innovative Products

2. Thomas T. Becker K.‐F. Braun T.et al. (2009).State‐of‐the‐art of 3D SiP technology.Proceedings of the International Microelectronics and Packaging Society (IMAPS)Chapter Poland (21–24 September 2009) Pszczyna Poland.

3. IEEE‐EPS Heterogeneous Integration Roadmap(2019).https://eps.ieee.org/technology/heterogeneous‐integration‐roadmap/2019‐edition.html

Cited by 1 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Panel Level Packaging – Where are the Technology Limits?;2022 IEEE 72nd Electronic Components and Technology Conference (ECTC);2022-05

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