Bio-inspired network on chip having both guaranteed throughput and best effort services using fault-tolerant algorithm

Author:

Sethi Muhammad Athar Javed1,Hussin Fawnizu Azmadi2,Hamid Nor Hisham2

Affiliation:

1. Department of Computer Systems Engineering; University of Engineering and Technology; Peshawar Pakistan

2. Department of Electrical and Electronic Engineering; Universiti Teknologi PETRONAS; Seri Iskander Malaysia

Publisher

Wiley

Subject

Electrical and Electronic Engineering

Reference86 articles.

1. Kumar S Jantsch A Soininen J-P Forsell M Millberg M Oberg J Tiensyrja K Hemani A VLSI, 2002. Proceedings. IEEE Computer Society Annual Symposium on 2002 105 112

2. Network-on-chip design and synthesis outlook;Atienza;INTEGRATION, the VLSI Journal,2008

3. A networks-on-chip architecture design space exploration-the LIB;Liu;Computers and Electrical Engineering,2009

4. An efficient routing methodology to tolerate static and dynamic faults in 2-D mesh networks-on-chip;Safaei;Microprocessors and Microsystems,2012

5. Clustered NOC, a suitable design for group communications in network on chip;Seifi;Computers and Electrical Engineering,2012

Cited by 1 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Bio-Inspired Solutions and Its Impact on Real-World Problems: A Network on Chip (NoC) Perspective;Application Specific Integrated Circuits - Technologies, Digital Systems and Design Methodologies;2019-04-17

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