Parameteric optimization of SiGe S/D NT JLFET using analytical modeling to improve L‐BTBT induced GIDL

Author:

Thakur Anchal1,Dhiman Rohit2,Wadhwa Girish1ORCID,Bhandari Sheetal3ORCID

Affiliation:

1. Department of Interdisciplinary Courses in Engineering Chitkara University Institute of Engineering and Technology, Chitkara University Chandigarh India

2. Department of Electronics and Communication Engineering National Institute of Technology Hamirpur India

3. Department of Electronics and Communication Engineering Pimpri Chinchwad College of engineering Pune India

Abstract

AbstractIn the present work, we investigate the impact of structure dimensional parameters on the short channel effects which occurs especially below 20 nm regime particularly gate induced drain leakage (GIDL) current. Using technology computer aided design simulation (TCAD), we have examined the GIDL for SiGe as source/drain in NTJLFET. The structural dimensional parameters such as the nanotube thickness, core and outer gates thickness and gate electrode work function shows the significant impact on the band to band tunneling in lateral direction (L‐BTBT) which induced GIDL current. It is analyzed that increase in the nanotube thickness and physical oxide thickness increase the GIDL current, while increasing the gate electrode work function, core gate and outer gate thicknesses gives reduced GIDL current. The SiGe S/D NTJLFET produce a remarkable high ION/IOFF ratio ~ 1011. A compact model for GIDL current is also developed which shows the dependency of structure parameters on leakage current. The SiGe has been incorporated as source and drain in NTJLFET which creates the energy band discontinuity. Furthermore, SiGe S/D NTJLFET is fairly compared with the conventional NT JLFET and nanowire (NW) JLFET and shows an improved performance.

Publisher

Wiley

Cited by 1 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Design and Analysis of a GaSb Heterojuncton Vertical TFET with Source Pocket for Work Function Engineering and Improved Analog Performance;2024 IEEE 3rd International Conference on Electrical Power and Energy Systems (ICEPES);2024-06-21

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