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Efficient and reliable fault analysis methodology for nanomagnetic circuits

  • Published:2016-09-08 Issue:5 Volume:45 Page:660-680
  • ISSN:0098-9886
  • Container-title:International Journal of Circuit Theory and Applications
  • language:en
  • Short-container-title:Int. J. Circ. Theor. Appl.

Author:

Turvani G.1,Riente F.1,Cairo F.1,Vacca M.1,Garlando U.1,Zamboni M.1,Graziano M.21

Affiliation:

1. Department of Electronics and Telecommunications; Politecnico di Torino; Turin Italy

2. London Centre for Nanotechnology; University College London; London UK

Publisher

Wiley

Subject

Applied Mathematics,Electrical and Electronic Engineering,Computer Science Applications,Electronic, Optical and Magnetic Materials

Reference51 articles.

1. International Technology Roadmap of Semiconductors 2012 http://public.itrs.net

2. Automating the sizing of transistors in CMOS gates for low-power and high-noise margin operation;Beg;International Journal of Circuit Theory and Applications,2014

3. Optimal transistor sizing for maximum yield in variation-aware standard cell design;Abbas;International Journal of Circuit Theory and Applications,2016

4. Quantum cellular automata;Lent;Nanotechnology,1993

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1. Design and energy analysis of a new fault-tolerant SRAM cell in quantum-dot cellular automata;Optical and Quantum Electronics;2022-08-03

2. A two‐dimensional RC network topology for fault‐tolerant design of analog circuits;International Journal of Circuit Theory and Applications;2022-04-21

3. A Model for the Evaluation of Monostable Molecule Signal Energy in Molecular Field-Coupled Nanocomputing;Journal of Low Power Electronics and Applications;2022-03-01

4. Design and Power Analysis of an Ultra-high Speed Fault-tolerant Full-adder Cell in Quantum-dot Cellular Automata;International Journal of Theoretical Physics;2022-02

5. FUNCODE: Effective Device-to-System Analysis of Field-Coupled Nanocomputing Circuit Designs;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2021-03
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