Profiling and controlling I/O‐related memory contention in COTS heterogeneous platforms-Reference-Cited by-同舟云学术

Profiling and controlling I/O‐related memory contention in COTS heterogeneous platforms

Published:2021-11-10 Issue: Volume: Page:
ISSN:0038-0644
Container-title:Software: Practice and Experience
language:en
Short-container-title:Softw Pract Exper

Author:

Zini Matteo¹^ORCID,Cicero Giorgiomaria¹,Casini Daniel¹²^ORCID,Biondi Alessandro¹²

Affiliation:

1. TeCIP Institute Scuola Superiore Sant'Anna Pisa Italy

2. Department of Excellence in Robotics & AI Scuola Superiore Sant'Anna Pisa Italy

Funder

Huawei Technologies

Publisher

Wiley

Subject

Software

Link

https://onlinelibrary.wiley.com/doi/pdf/10.1002/spe.3053

Reference72 articles.

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3. RestucciaF BiondiA MarinoniM CiceroG ButtazzoG.AXI HyperConnect: a predictable hypervisor‐level AXI interconnect for hardware accelerators in FPGA SoC. Proceedings of the 57th ACM/ESDA/IEEE Design Automation Conference (DAC 2020); 2020; San Francisco CA.

4. YunH YaoG PellizzoniR CaccamoM ShaL.MemGuard: memory bandwidth reservation system for efficient performance isolation in multi‐core platforms. Proceedings of the 2013 IEEE 19th Real‐Time and Embedded Technology and Applications Symposium (RTAS); 2013:55‐64.

5. GracioliG AlhammadA MancusoR FröhlichAA PellizzoniR.A survey on cache management mechanisms for real‐time embedded systems; 2015.

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