Design and analysis of CNTFET based 10T SRAM for high performance at nanoscale

Author:

Kumar Mukesh1ORCID,Ubhi Jagpal Singh1

Affiliation:

1. Department of ECESant Longowal Institute of Engineering and Technology Punjab India

Publisher

Wiley

Subject

Applied Mathematics,Electrical and Electronic Engineering,Computer Science Applications,Electronic, Optical and Magnetic Materials

Reference31 articles.

1. Challenges and solutions for late‐ and post‐silicon design;Rabaey JM;Design,2008

2. The end of CMOS scaling

3. A data aware 9T static random access memory cell for low power consumption and improved stability;Singh AK;Int J Circuit Theory Appl,2012

4. A write-improved low-power 12T SRAM cell for wearable wireless sensor nodes

5. A Novel High-Speed, Low-Power CNTFET-Based Inexact Full Adder Cell for Image Processing Application of Motion Detector

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