GaAs high-k dielectric metal-insulator-semiconductor structure having silicon interface control layer-Reference-Cited by-同舟云学术

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GaAs high-k dielectric metal-insulator-semiconductor structure having silicon interface control layer

Published:2008-07 Issue:9 Volume:5 Page:2729-2732
ISSN:1610-1634
Container-title:physica status solidi (c)
language:en
Short-container-title:phys. stat. sol. (c)

Author:

Akazawa M.,Hasegawa H.

Publisher

Wiley

Subject

Condensed Matter Physics

Reference8 articles.

1. R. Chau, Technical Digest of 64th Device Research Conference, Penn State Univ., Pennsylvania, June, 26-28, 3 (2006).

2. Benchmarking Nanotechnology for High-Performance and Low-Power Logic Transistor Applications

3. Enhancement-Mode GaAs n-Channel MOSFET

4. Vertical high-mobility wrap-gated InAs nanowire transistor

5. MBE growth and applications of silicon interface control layers

Cited by 2 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Effect of In0.53Ga0.47As Surface Nitridation on Electrical Characteristics of High-k/ Capacitors;ECS Transactions;2013-03-15

2. Admittance study of GaAs high-k metal-insulator-semiconductor capacitors with Si interface control layer;Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures;2008

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