A 10 b 25 MS/s 4.8 mW 0.13 µm CMOS ADC with switched-bias power-reduction techniques-Reference-Cited by-同舟云学术

A 10 b 25 MS/s 4.8 mW 0.13 µm CMOS ADC with switched-bias power-reduction techniques

Published:2009-11 Issue:9 Volume:37 Page:955-967
ISSN:0098-9886
Container-title:International Journal of Circuit Theory and Applications
language:en
Short-container-title:Int. J. Circ. Theor. Appl.

Author:

Choi Hee-Cheol,Kim Young-Ju,Lee Kyung-Hoon,Kim Younglok,Lee Seung-Hoon

Publisher

Wiley

Subject

Applied Mathematics,Electrical and Electronic Engineering,Computer Science Applications,Electronic, Optical and Magnetic Materials

Reference22 articles.

1. Wang R, Martin K, Johns D, Burra G. A 3.3 mW 12 MS/s pipelined ADC in 90 nm digital CMOS. ISSCC Digest of Technical Papers, San Francisco, U.S.A., February 2005; 278-279.

2. Cho Y, Sa D, Kim Y, Lee K, Choi H, Lee S. A 10 b 25 MS/s 4.8 mW 0.13µm CMOS ADC for digital multimedia broadcasting applications. Proceedings of CICC'06, San Jose, U.S.A., September 2006; 497-500.

3. A 1.4-V 10-bit 25-MS/s pipelined ADC using opamp-reset switching technique;Chang;IEEE Journal of Solid-State Circuits,2003

4. A 5-b 10-GSample/s A/D converter for 10-gb/s optical receivers;Lee;IEEE Journal of Solid-State Circuits,2004

5. Low-power design of high-speed A/D converters;Kawahito;IEICE Transaction on Electronics,2005

Cited by 11 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Low power 9-bit 500 kS/s 2-stage cyclic ADC using OTA variable bias current;Analog Integrated Circuits and Signal Processing;2020-08-04

2. A pseudo-differential current-reuse structure for opamp-sharing pipelined analog-to-digital converters;International Journal of Circuit Theory and Applications;2014-02-27

3. FFT-based calibration method for 1.5 bit/stage pipelined ADCs;International Journal of Circuit Theory and Applications;2013-10-03

4. Design of a 1-GSample/s 9-b double sampling track-and-hold amplifier in BiCMOS technology;International Journal of Circuit Theory and Applications;2012-10-17

5. A 12-bit multi-channel dual-mode successive approximation ADC for power management bus (Pmbus) devices;International Journal of Circuit Theory and Applications;2011-10-07