An FPGA comparative study of high‐level and low‐level combined designs for HEVC intra, inverse quantization, and IDCT/IDST 2D modules

Author:

Ben Atitallah Ahmed12ORCID,Kammoun Manel23ORCID,Ali Karim M.A.4ORCID,Ben Atitallah Rabie5ORCID

Affiliation:

1. Department of Electrical EngineeringJouf University Aljouf Saudi Arabia

2. LETI (E.N.I.S.)University of Sfax Sfax Tunisia

3. Digital Research Center of SfaxTechnopole of Sfax Sfax Tunisia

4. LAMIH LaboratoryUniversity of Valenciennes Valenciennes France

5. Computer Science DepartmentUniversity of Galatasaray Istanbul Turkey

Publisher

Wiley

Subject

Applied Mathematics,Electrical and Electronic Engineering,Computer Science Applications,Electronic, Optical and Magnetic Materials

Reference48 articles.

1. Reconfigurable architecture of VDF filter for multidimensional data

2. An FPGA implementation of HW/SW codesign architecture for H.263 video coding

3. A Very High Throughput Deblocking Filter for H.264/AVC

4. Ben AtitallahA KadionikP GhozziF NouelP MasmoudiN MarchegayP. “Optimization and implementation on FPGA of the DCT/IDCT algorithm” IEEE ICASSP '06 Toulouse France 14‐19 May 2006.

5. Are We There Yet? A Study on the State of High-Level Synthesis

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