Gate leakage currents model for FinFETs implemented in Verilog-A for electronic circuits design-Reference-Cited by-同舟云学术

Gate leakage currents model for FinFETs implemented in Verilog-A for electronic circuits design

Published:2014-03-07 Issue:5-6 Volume:27 Page:846-862
ISSN:0894-3370
Container-title:International Journal of Numerical Modelling: Electronic Networks, Devices and Fields
language:en
Short-container-title:Int. J. Numer. Model.

Author:

Garduño Salvador I.¹,Alvarado Joaquín¹,Cerdeira Antonio²,Estrada Magali²,Kilchytska Valeriya³,Flandre Denis³

Affiliation:

1. Research Center of Semiconductor Devices; BUAP; Av. San Claudio y 14 Sur 72570 Puebla Mexico

2. Department of Electrical Engineering; CINVESTAV; Av. IPN No. 2508, A.P. 14-740 07300 Mexico Mexico

3. ICTEAM Institute; Université catholique de Louvain (UCL); Place du Levant 3 B-1348 Louvain-la-Neuve Belgium

Funder

CONACyT

FNRS

Publisher

Wiley

Subject

Electrical and Electronic Engineering,Computer Science Applications,Modelling and Simulation

Reference25 articles.

1. International Technology Roadmap Semiconductors (ITRS) Process integration, devices and structures 2011 http://www.itrs.net/Links/2011ITRS/Home2011.htm

2. A comprehensive review on microwave FinFET modeling for progressing beyond the state of art;Crupi;Solid-State Electron,2013

3. The SOI MOSFET: from Single Gate to Multigate

4. Silicon integrated circuit technology from past to future;Iwai;Microelectro Reliab,2002

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1. Reducing Off-State and Leakage Currents by Dielectric Permittivity-Graded Stacked Gate Oxides on Trigate FinFETs: A TCAD Study;Micromachines;2024-05-30

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3. Extensive Analysis of Gate Leakage Current in Nano-Scale Multi-gate MOSFETs;Transactions on Electrical and Electronic Materials;2022-06-13