A novel low leakage saddle junctionless FET with assistant gate-Reference-Cited by-同舟云学术

A novel low leakage saddle junctionless FET with assistant gate

Published:2018-06-14 Issue:1 Volume:32 Page:e2465
ISSN:0894-3370
Container-title:International Journal of Numerical Modelling: Electronic Networks, Devices and Fields
language:en
Short-container-title:Int J Numer Model

Author:

Jin Xiaoshi¹^ORCID,Gao Yunxiang¹,Yang Guangrui¹,Xia Zhengliang¹,Liu Xi¹,Lee Jong‐Ho²

Affiliation:

1. School of Information Science and EngineeringShenyang University of Technology Shenyang 110870 China

2. School of EECS Eng. and ISRC (Inter‐University Semiconductor Research Center)Seoul National University Shinlim‐Dong, Kwanak‐Gu Seoul 151‐742 South Korea

Funder

Natural Science Foundation of Liaoning Province

Publisher

Wiley

Subject

Electrical and Electronic Engineering,Computer Science Applications,Modelling and Simulation

Link

https://onlinelibrary.wiley.com/doi/pdf/10.1002/jnm.2465

Reference14 articles.

1. Nanowire transistors without junctions

2. Simulation study on deep nanoscale short channel junctionless SOI FinFETs with triple-gate or double-gate structures

3. Scaling of Trigate Junctionless Nanowire MOSFET With Gate Length Down to 13 nm