Optimization of Novel L-shaped Gate All Around Junctionless Field Effect Transistor
Author:
Affiliation:
1. Shahid Beheshti University,Faculty of Electrical Engineering,Tehran,Iran
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9826875/9827000/09827040.pdf?arnumber=9827040
Reference10 articles.
1. Ultra-thin films and multigate devices architectures for future CMOS scaling
2. Dual-Mode On-to-Off Modulation of Plasmon-Induced Transparency and Coupling Effect in Patterned Graphene-Based Terahertz Metasurface
3. Optimization of saddle junctionless FETs for extreme high integration
4. Subthreshold behavior models for short-channel junctionless tri-material cylindrical surrounding-gate MOSFET
5. Dual Metal Gate and Conventional MOSFET at Sub nm for Analog Application
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