Graphs in floor-plan design

Author:

Otten Ralph H. J. M.

Publisher

Wiley

Subject

Applied Mathematics,Electrical and Electronic Engineering,Computer Science Applications,Electronic, Optical and Magnetic Materials

Reference33 articles.

1. A Dual Linear Graph Representation for Space-filling Location Problems of the Floor-planning Type, MIT Press, Cambridge (Mass), U.S.A., 1970.

2. Planar Graphs

3. ‘Representation and generation of rectangular dissections’, Proc. 15th Design Automation Conference, Las Vegas (Nev), U.S.A. 1978, pp. 138–144.

4. Placement algorithms for custom VLSI

5. The dissection of rectangles into squares

Cited by 12 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Cost reduction in bottom-up hierarchical-based VLSI floorplanning designs;International Journal of Circuit Theory and Applications;2013-07-19

2. A multiobjective optimization tool for Very Large Scale Integrated nonslicing floorplanning;International Journal of Circuit Theory and Applications;2012-01-31

3. Decoupling capacitance allocation and its application to power-supply noise-aware floorplanning;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2002

4. Buffer block planning for interconnect planning and prediction;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2001-12

5. Routability-driven repeater block planning for interconnect-centric floorplanning;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2001-05

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