Placement algorithms for custom VLSI-Reference-Cited by-同舟云学术

Placement algorithms for custom VLSI

Published:1984-01 Issue:1 Volume:16 Page:45-50
ISSN:0010-4485
Container-title:Computer-Aided Design
language:en
Short-container-title:Computer-Aided Design

Author:

Supowit Kenneth J.,Slutz Eric A.

Publisher

Elsevier BV

Subject

Industrial and Manufacturing Engineering,Computer Graphics and Computer-Aided Design,Computer Science Applications

Reference16 articles.

1. SHARPS: a hierarchical layout system for VLSI;Chiba,1981

2. An automatic/interactive layout planning system for arbitrarily-sized rectangular building blocks;Horng,1981

3. Placement and routing algorithms for hierarchical integrated circuit layout;Preas;Doctoral dissertation Dept of Electrical Engineering, Stanford University, CA, USA,1980

4. Shape determination and placement algorithms for hierarchical integrated circuit layout;Slutz;Doctoral dissertation Department of Electrical Engineering and Computer Science, Stanford University, CA, USA,1980

5. The genealogical approach to the layout problem;Szepieniec,1980

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1. Densely packed rectangulations;Environment and Planning B: Planning and Design;1998

2. Area minimization for hierarchical floorplans;Algorithmica;1996-06

3. Topology optimization of arbitrary-size blocks using a bivariate formulation;Computer-Aided Design;1992-10

4. Hierarchical Generate-and-Test vs Constraint-Directed Search;Artificial Intelligence in Design ’92;1992

5. Nonlinear programming approach to automated topology optimization;Computer-Aided Design;1989-03