TOAST: Automatic tiling for iterative stencil computations on GPUs-Reference-Cited by-同舟云学术

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TOAST: Automatic tiling for iterative stencil computations on GPUs

Published:2017-02-02 Issue:8 Volume:29 Page:e4053
ISSN:1532-0626
Container-title:Concurrency and Computation: Practice and Experience
language:en
Short-container-title:Concurrency Computat.: Pract. Exper.

Author:

Rocha Rodrigo C. O.¹,Pereira Alyson D.²,Ramos Luiz³,Góes Luís F. W.¹

Affiliation:

1. Pontifícia Universidade Católica de Minas Gerais (PUC Minas); Belo Horizonte 30535-901 MG Brazil

2. Universidade Federal de Santa Catarina (UFSC); Florianópolis 88040-900 SC Brazil

3. Universidade Estadual de Campinas (Unicamp); Campinas 13083-852 SP Brazil

Publisher

Wiley

Subject

Computational Theory and Mathematics,Computer Networks and Communications,Computer Science Applications,Theoretical Computer Science,Software

Reference34 articles.

1. Holewinski J Pouchet L-N Sadayappan P High-performance code generation for stencil computations on GPU architectures ACM ICS New York, NY, USA 2012 311 320

2. Datta K Murphy M Volkov V Williams S Carter J Oliker L Patterson D Shalf J Yelick K Stencil computation optimization and auto-tuning on state-of-the-art multicore architectures ACM/IEEE SC Austin, TX, USA 2008 4:1 4:12

3. Han D Xu S Chen L Huang L PADS: a pattern-driven stencil compiler-based tool for reuse of optimizations on GPGPUs IEEE ICPADS Tainan, Taiwan 2011 308 315

4. Kamil S Chan C Oliker L Shalf J Williams S An auto-tuning framework for parallel multicore stencil computations IEEE IPDPS Atlanta, GA, USA 2010 1 12

5. Mametjanov A Lowell D Ma C-C Norris B Autotuning stencil-based computations on GPUs IEEE Cluster Beijing, China 2012 266 274

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