Author:
Han Dongni,Xu Shixiong,Chen Li,Huang Lei
Cited by
6 articles.
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1. Optimizing inter-nest data locality in imperfect stencils based on loop blocking;The Journal of Supercomputing;2018-05-30
2. TOAST: Automatic tiling for iterative stencil computations on GPUs;Concurrency and Computation: Practice and Experience;2017-02-02
3. SDSLc;Proceedings of the 5th International Workshop on Domain-Specific Languages and High-Level Frameworks for High Performance Computing;2015-11-15
4. Trace-Driven Memory Access Pattern Recognition in Computational Kernels;Proceedings of the Second Workshop on Optimizing Stencil Computations;2014-10-20
5. The Relation Between Diamond Tiling and Hexagonal Tiling;Parallel Processing Letters;2014-09