Affiliation:
1. Department of Electronics & Communication Engineering, National Institute of Technology, Patna,India
2. Department of Electrical Engineering, University of Engineering & Management, Jaipur,India
Abstract
Background:
The squarer or squaring circuit is extensively used in communication systems
as a mathematical function with applications of frequency doublers, Finite Impulse Response
(FIR) filters, peak amplitude detectors, digital processors and analog multipliers, etc. and especially
for square law detection circuits.
Objective:
Vedic multipliers are popular mainly for their simplicity in the literature of digital
multipliers.
Methods:
Recently, proposed 2-bit square calculator or self-multiplier already gained the attraction
of the researchers.
Results & Conclusion:
In this paper, two bits squarer or self-multiplier or square calculator has
been successfully coded using VHDL, verified in Xilinx tool and finally implemented in popular
FPGA Spartan kit.
Publisher
Bentham Science Publishers Ltd.
Subject
Electrical and Electronic Engineering,Control and Optimization,Computer Networks and Communications,Computer Science Applications
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