GraphiDe-Reference-Cited by-同舟云学术

GraphiDe

Published:2019-05-13 Issue: Volume: Page:
ISSN:
Container-title:Proceedings of the 2019 on Great Lakes Symposium on VLSI
language:
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Author:

Angizi Shaahin¹,Fan Deliang¹

Affiliation:

1. University of Central Florida, Orlando, FL, USA

Funder

National Science Foundation

Publisher

ACM

Link

https://dl.acm.org/doi/pdf/10.1145/3299874.3317984

Reference20 articles.

1. 2018. Parallel Thread Execution ISA Version 6.1. (2018). http://docs.nvidia.com/cuda/parallel-thread-execution/index.html. 2018. Parallel Thread Execution ISA Version 6.1. (2018). http://docs.nvidia.com/cuda/parallel-thread-execution/index.html.

2. Shaizeen Aga et al. 2017. Compute Caches. In HPCA. IEEE 481--492. Shaizeen Aga et al. 2017. Compute Caches. In HPCA. IEEE 481--492.

3. A scalable processing-in-memory accelerator for parallel graph processing;Junwhan Ahn;Computer Architecture News,2016

4. CMP-PIM

5. Shaahin Angizi Zhezhi He etal 2017. Design and evaluation of a spintronic in-memory processing platform for non-volatile data encryption. IEEE TCAD (2017). 10.1109/TCAD.2017.2774291 Shaahin Angizi Zhezhi He et al. 2017. Design and evaluation of a spintronic in-memory processing platform for non-volatile data encryption. IEEE TCAD (2017). 10.1109/TCAD.2017.2774291

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