Study on logic-based routing for 3D NOCs
Author:
Affiliation:
1. GuangDong University of Finance, Guangzhou, Guangdong, China
2. University of Catania, Catania Italy
Funder
Natural Science Foundation of Guangdong
Science and Technology Planning Project of Guangdong
Publisher
ACM
Link
https://dl.acm.org/doi/pdf/10.1145/3356045.3360717
Reference21 articles.
1. Route packets, not wires: on-chip interconnection networks
2. 3-D ICs: a novel chip design for improving deep-submicrometer interconnect performance and systems-on-chip integration
3. Cluster-based topologies for 3D Networks-on-Chip using advanced inter-layer bus architecture
4. 3D System Integration Technologies
5. GCA:Global Congestion Awareness for Load Balance in Networks-on-Chip
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