Compositional Dataflow Circuits

Author:

Edwards Stephen A.1,Townsend Richard1ORCID,Barker Martha1,Kim Martha A.1

Affiliation:

1. Columbia University, New York, NY

Abstract

We present a technique for implementing dataflow networks as compositional hardware circuits. We first define an abstract dataflow model with unbounded buffers that supports data-dependent blocks (mux, demux, and nondeterministic merge); we then show how to faithfully implement such networks with bounded buffers and handshaking. Handshaking admits compositionality: our circuits can be connected with or without buffers, and combinational cycles arise only from a completely unbuffered cycle. While bounding buffer sizes can cause the system to deadlock prematurely, the system is guaranteed to produce the same, correct, data before then. Thus, unless the system deadlocks, inserting or removing buffers only affects its performance. We demonstrate how this enables design space to be explored.

Publisher

Association for Computing Machinery (ACM)

Subject

Hardware and Architecture,Software

Reference43 articles.

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3. Implementing latency-insensitive dataflow blocks

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