Synthesis of low power clock trees for handling power-supply variations
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ACM Press
Cited by 7 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Synthesis of Clock Networks with a Mode-Reconfigurable Topology;ACM Transactions on Design Automation of Electronic Systems;2022-03-08
2. Synthesis of Clock Networks with a Mode Reconfigurable Topology and No Short Circuit Current;Proceedings of the 2020 International Symposium on Physical Design;2020-03-20
3. Fast clock scheduling and an application to clock tree synthesis;Integration;2017-01
4. Construction of Reconfigurable Clock Trees for MCMM Designs Using Mode Separation and Scenario Compression;ACM Transactions on Design Automation of Electronic Systems;2016-09-22
5. Construction of Latency-Bounded Clock Trees;Proceedings of the 2016 on International Symposium on Physical Design;2016-04-03
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