The Forward Slice Core Microarchitecture-Reference-Cited by-同舟云学术

The Forward Slice Core Microarchitecture

Published:2020-09-30 Issue: Volume: Page:
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Container-title:Proceedings of the ACM International Conference on Parallel Architectures and Compilation Techniques
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Author:

Lakshminarasimhan Kartik¹,Naithani Ajeya¹,Feliu Josué²,Eeckhout Lieven¹

Affiliation:

1. Ghent University, Ghent, Belgium

2. Universidad de Murcia, Murcia, Spain

Publisher

ACM

Link

https://dl.acm.org/doi/pdf/10.1145/3410463.3414629

Reference24 articles.

1. Delay and Bypass: Ready and Criticality Aware Instruction Scheduling in Out-of-Order Processors

2. ARM. ARM Cortex-A7 processor. http://www.arm.com/products/processors/cortex-a/cortex-a7.php. ARM. ARM Cortex-A7 processor. http://www.arm.com/products/processors/cortex-a/cortex-a7.php.

3. "Flea-flicker" Multipass Pipelining: An Alternative to the High-Power Out-of-Order Offense

4. The load slice core microarchitecture

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