Software Transactional Memory: Why Is It Only a Research Toy?

Author:

Cascaval Calin,Blundell Colin,Michael Maged,Cain Harold W.,Wu Peng,Chiras Stefanie,Chatterjee Siddhartha1

Affiliation:

1. STEC

Abstract

TM (transactional memory) is a concurrency control paradigm that provides atomic and isolated execution for regions of code. TM is considered by many researchers to be one of the most promising solutions to address the problem of programming multicore processors. Its most appealing feature is that most programmers only need to reason locally about shared data accesses, mark the code region to be executed transactionally, and let the underlying system ensure the correct concurrent execution. This model promises to provide the scalability of fine-grain locking, while avoiding common pitfalls of lock composition such as deadlock. In this article we explore the performance of a highly optimized STM and observe that the overall performance of TM is significantly worse at low levels of parallelism, which is likely to limit the adoption of this programming paradigm.

Publisher

Association for Computing Machinery (ACM)

Subject

General Computer Science

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